synchronizing circuit

基本解释

Design of a Circuit Synchronizing the Byte Clock with the Parallel Data in the Deserializer;
在串并转换接收器中，并行数据在字节时钟的作用下并行输出。
A synchronizing nonalltonomus chaotic circuit is presented with RC-QP Amp. It can be used to demonstrate experiment teaching of chaotic theory.
本文给出一种用普通的电阻、电容和运算放大器实现的非自治混沌信号发生器电路，适用于进行混沌理论的演示实验教学。
In the circuit design, unit current source arrays and digital synchronizing cells are used to improve the matching and dynamic range of DAC.
电路设计中使用单位电流源阵列和数字同步控制单元来提高电流源的匹配性和动态范围；