branch target buffer

基本解释

The fetcher also generates a search address for output to the branch target buffer.
指令读取器亦产生搜寻位址输出至分支目标缓冲器中。
The branch target buffer is provided with a tag RAM that is organized in a set associative fashion.
分支目标缓冲器提供一个架构成集合相关式的标签…
Using system simulator, we synthetized the effect of the prediction scheme and the branch target buffer. The conclusion is useful to the single-issue-pipeline microprocessor design.
实验基于系统级模拟器，综合转移预测策略和转移目标缓冲器行为进行完整模拟，结论对于其它采用单发射流水线结构的微处理器设计具有较好的借鉴意义。